E-Cat
Member
UPDATE 1:
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DISCLAIMER: This analysis is mostly based off of my own intuition from reading various investor briefings. Also, I realize that TSMC is not the only foundry and that AMD have thus far used GloFo's 14nm due to their contractual obligations. However, I have included some ASML remarks, which it should be clear that they have wider reaching implications for the whole industry. After all, they make the machines that the foundries use to make their machines. Anyway, I actually hope to be proven wrong on this theory and will continue to update the OP as relevant information becomes available.
There is a precedent from recent history, i.e., the 20/16nm situation, where we were stuck on 28nm for 4 years and 4 months before NVIDIA launched the GTX 1080 in May. 20nm was the last planar node before FinFET, and for good reason, as there was a lack of power scaling to match the increased transistor density; thus, raising TDP and voltage issues that made 20nm GPUs a non-starter.
Conversely, the issue with 10nm may not have to do with the underlying technology: http://www.tsmc.com/uploadfile/ir/quarterly/2015/3C2bO/E/TSMC 3Q15 transcript.pdf
Indeed, the node appears very much in line with your typical power and density requirements for a Moore's law like progression.
So why bring up 20/16nm? Well, it turns out there are some similarities. Just as the 16nm manufacturing technologies utilized the same planar back-end interconnect originally designed for 20nm, TSMC are planning to leverage the 10nm tool compatibility and maturity from volume production with the 7nm process; essentially treating the 10/7nm dependence analogously to 20/16nm: http://www.tsmc.com/uploadfile/ir/quarterly/2016/1yk4i/E/TSMC 1Q16 transcript.pdf
Being a small node means a limited number of wafers: http://seekingalpha.com/article/398...-results-earnings-call-transcript?part=single
Having a limited wafer capacity means that the big customers at the top of the pecking order will gobble it all up. This means Apple, et al. They set up the cadence where new A1x chips are needed in volume for the new iPhone launch, which tends to be September. So that means volume ramp in the first half of the year, which means tapeout/risk production the year prior. The GPU companies get the scraps typically one year after the mobile manufacturers.
But now it's one year after and everybody's moving to 7nm! The production yield ramps are fantastic on the tried and tested tools, and wafer prices are plummeting. Meanwhile, the remaining 10nm capacity has dried up and is only used for some esoteric applications where the margin is irrelevant.
TSMC in their quarterly calls went from treating 10/7nm as a monolithic lump to relegating 10nm as a primarily 'mobile node'. Very telling: http://www.tsmc.com/uploadfile/ir/quarterly/2015/4T5Um/E/TSMC 4Q15 transcript.pdf
that basically all the capacity will be spent fulfilling the mobile manufacturers' orders;
then, everybody rapidly moves on to 7nm which is tracking unusually close to 10nm with
excellent yield/power/density characteristics and is being aggressively adopted by
high-performance computing, mobile GPU and game console people.
---
DISCLAIMER: This analysis is mostly based off of my own intuition from reading various investor briefings. Also, I realize that TSMC is not the only foundry and that AMD have thus far used GloFo's 14nm due to their contractual obligations. However, I have included some ASML remarks, which it should be clear that they have wider reaching implications for the whole industry. After all, they make the machines that the foundries use to make their machines. Anyway, I actually hope to be proven wrong on this theory and will continue to update the OP as relevant information becomes available.
There is a precedent from recent history, i.e., the 20/16nm situation, where we were stuck on 28nm for 4 years and 4 months before NVIDIA launched the GTX 1080 in May. 20nm was the last planar node before FinFET, and for good reason, as there was a lack of power scaling to match the increased transistor density; thus, raising TDP and voltage issues that made 20nm GPUs a non-starter.
Conversely, the issue with 10nm may not have to do with the underlying technology: http://www.tsmc.com/uploadfile/ir/quarterly/2015/3C2bO/E/TSMC 3Q15 transcript.pdf
TSMC said:
Indeed, the node appears very much in line with your typical power and density requirements for a Moore's law like progression.
So why bring up 20/16nm? Well, it turns out there are some similarities. Just as the 16nm manufacturing technologies utilized the same planar back-end interconnect originally designed for 20nm, TSMC are planning to leverage the 10nm tool compatibility and maturity from volume production with the 7nm process; essentially treating the 10/7nm dependence analogously to 20/16nm: http://www.tsmc.com/uploadfile/ir/quarterly/2016/1yk4i/E/TSMC 1Q16 transcript.pdf
Why is this important? One reason is that due to 95% of the equipment being used for 10nm being compatible with 7nm, the planned risk production for 7nm is able to commence only five quarters after 10nm--the typical time for such a transition being closer to two years. In other words, 10nm is going to be a very short-lived node in the echelon of nodes.TSMC said:
Being a small node means a limited number of wafers: http://seekingalpha.com/article/398...-results-earnings-call-transcript?part=single
ASML said:
Having a limited wafer capacity means that the big customers at the top of the pecking order will gobble it all up. This means Apple, et al. They set up the cadence where new A1x chips are needed in volume for the new iPhone launch, which tends to be September. So that means volume ramp in the first half of the year, which means tapeout/risk production the year prior. The GPU companies get the scraps typically one year after the mobile manufacturers.
But now it's one year after and everybody's moving to 7nm! The production yield ramps are fantastic on the tried and tested tools, and wafer prices are plummeting. Meanwhile, the remaining 10nm capacity has dried up and is only used for some esoteric applications where the margin is irrelevant.
Knowing all this; if you're NVIDIA or AMD, do you even design an architecture for 10nm or skip straight to 7nm? We know that Volta is almost certainly going to be 16nm; Navi is a bigger question mark as it's coming in 2018 when you would expect to see 10nm, if ever. More likely it will be 7nm.ASML said:
TSMC in their quarterly calls went from treating 10/7nm as a monolithic lump to relegating 10nm as a primarily 'mobile node'. Very telling: http://www.tsmc.com/uploadfile/ir/quarterly/2015/4T5Um/E/TSMC 4Q15 transcript.pdf
<-- Notice the mention of 'game console'? Hmm, interesting. However, one quarter later: http://www.tsmc.com/uploadfile/ir/quarterly/2016/1yk4i/E/TSMC 1Q16 transcript.pdfTSMC said:
'Game console' now appears solely on 7nm. No mention of 'advanced graphics' or 'high-performance computing' on 10nm. By Q2, everything points to a graceful mass exodus: http://www.tsmc.com/uploadfile/ir/quarterly/2016/2izbs/E/TSMC 2Q16 transcript.pdfTSMC said:
tl;dr: 10nm is bound to be a small node as revealed by credible entities - reasonable to inferTSMC said:
that basically all the capacity will be spent fulfilling the mobile manufacturers' orders;
then, everybody rapidly moves on to 7nm which is tracking unusually close to 10nm with
excellent yield/power/density characteristics and is being aggressively adopted by
high-performance computing, mobile GPU and game console people.
